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| device operating temperature range package semiconductor technical data highside tmos driver ordering information MC33091Ad MC33091Ap t a = 40 to +125 c so8 plastic dip pin connections order this document by MC33091A/d d suffix plastic package case 751 (so8) 8 1 8 1 p suffix plastic package case 626 1 src gnd v t input fault v cc 2 3 4 8 7 6 5 drn gate (top view) 1 motorola analog ic device data the MC33091A is a highside tmos driver designed for use in harsh automotive switching applications requiring the capability of handling high voltages attributed to load and field dump transients, as well as reverse and double battery conditions. few external components are required to drive a wide variety of nchannel tmos devices. the MC33091A, driving an appropriate tmos device, offers economical system solutions for highside switching large currents. the MC33091A has cmos compatible input control, charge pump to drive the tmos power transistor, basic fault detection circuit, v ds monitoring circuit used to detect a shorted tmos load, and overcurrent protection timer with associated current squaring circuitry. short circuit protection is made possible by having a unique v ds voltage to current converter drive an externally programmable integrator circuit. this circuit affords fast detection of a shorted load while allowing difficult loads, such as lamps having high inrush currents, additional time to turn on. the fault output is comprised of an open collector npn transistor requiring a single pullup resistor for operation. a fault is reported whenever the mosfet oncurrent exceeds an externally programmed set level. the MC33091A is available in the plastic 8pin dip package as well as the plastic 8pin surface mount package. ? designed for automotive highside driver applications ? works with a wide variety of nchannel power mosfets ? drives inductive loads with no external clamp circuitry required ? cmos logic compatible input control ? onboard charge pump with no external components required ? shorted load detection and protection ? forward overvoltage and reverse battery protection ? load and field dump protection ? extended operating temperature range ? fault output to report a mosfet overcurrent condition s q + + i sq fault overvoltage shutdown r x r s drn 2 c s v cc 5 +v s input 7 6 + qr current squaring circuit + gnd 3v t 8 c t r t charge pump gate 4 src 1 load MC33091A simplified block diagram this device contains 54 active transistors. ? motorola, inc. 1996 rev 0 MC33091A 2 motorola analog ic device data maximum ratings rating symbol value unit supply voltage (pin 5) (note 1) v cc 0.7 to 28 v continuous (without activating clamp) 7.0 to 28 continuous supply clamp current (pin 5) i c ma dip package (case 626) 10 so8 package (case 751) 1.0 input control voltage range (pin 7) v in v continuous 0.7 to 28 fault pullup voltage range (pin 6) v out v continuous 0.7 to 28 minimum esd voltage capability (note 2) esd 2000 v operating junction temperature t j 150 c storage temperature t stg 65 to +150 c operating ambient temperature range t a 40 to +125 c thermal resistance, junctiontoambient r q ja c/w dip package (case 626) 100 so8 package (case 751) 145 notes: 1. an internal zener diode is incorporated to protect the device from overvoltage transients in excess of 30 v. 2. esd testing performed in accordance with human body model (c = 100 pf, r = 1500 w ). s q + + i sq fault overvoltage shutdown r x = 75 k r s = 200 drn 2 0.1 v cc 5 +v s input 7 6 + qr current squaring circuit + gnd 3v t 8 c t r t charge pump gate 4 src 1 load MC33091A 9.1 k 2.6 v 40 v 40 v v th 4.3 v v tl 0.95 v 14 v 1.0 v r 30 v 1.0 k figure 1. typical application +5.0 v MC33091A 3 motorola analog ic device data electrical characteristics (values are noted under conditions of 7.0 v v cc 24 v, 40 c t a +125 c, unless otherwise noted. typical values reflect approximate mean at t a = 25 c at time of device characterization.) characteristics symbol min typ max unit supply current (note 1) i cc v in = 0 v 160 300 m a v in = 5.0 v (r x = 100 k) 2.5 6.0 ma supply clamp voltage (note 2) v z 29 35 v gatetosource voltage range (pin 4) v gs 8.0 12 15 v gate current (pin 4) i g m a v g = v cc 30 400 gate saturation voltage (i g = 10 m a) v g(sat) 0 1.2 1.4 v short circuit gate voltage (note 4) i gc 6.4 7.0 7.7 v input control threshold voltage (pin 7) v v il 2.7 1.5 v ih 3.5 2.7 input control current (pin 7) (v in = 5.0 v) i in 100 250 m a timer current constant (pin 8) k m a/v 2 (r x = 100 k, v t = 0, v ds = 1.0 v) (note 3) 0.7 1.1 1.5 timer (pin 8) v lower threshold voltage v tl 0.4 0.95 1.2 upper threshold voltage v th 4.3 4.6 5.2 fault sink current (pin 6) v f = 5.0 v i ol 500 m a v f = 0 i oh 2.0 100 na fault saturation voltage (pin 6) (i f = 500 m a) v ol 0.2 0.8 v notes: 1. the total supply current into pin 2 and pin 5 with r x = 100 k (from pin 2 to supply) and 45 k pullup resistor from pin 6 to supply. 2. an internal zener clamp is provided to protect the device from overvoltage transients on the supply line. 3. the timer current constant is the proportionality constant of the voltage to current converter used to monitor the v ds voltage developed across the fet (from pin 1 to the supply). 4. the gate voltage will be clamped at approximately 7.0 v above the source voltage whenever the source voltage is less than approximately 1.0 v above ground. i cc figure 2. supply current versus supply voltage 600 500 400 300 200 100 0 , supply current ( a) figure 3. operating current versus supply voltage 6.0 2.0 1.0 i cc t a = 40 c t a = 25 c t a = 125 c v in = 0 v (gate aoffo) v ds = 2.0 v 5.0 4.0 3.0 , operating current (ma) v cc , supply voltage (v) 6.0 12 18 24 30 v cc , supply voltage (v) 6.0 12 18 24 30 t a = 40 c t a = 25 c t a = 125 c v in = 5.0 v (gate aono) m MC33091A 4 motorola analog ic device data 600 0.1 500 400 100 0.1 350 , timer current ( i sq 250 200 150 100 50 m v cc = 14 v v in = 5.0 v r x = 75 k 300 200 v cc = 14 v v in = 5.0 v t a = 25 c r x = 50 k r x = 100 k r x = 75 k v ds 2 , draintosource voltage squared (v 2 ) 0 50 100 150 200 v ds 2 , draintosource voltage squared (v 2 ) 0.1 50 100 150 200 a) 200 0 180 160 140 100 80 60 120 , input control current ( i in 100 80 60 40 20 m v cc = 14 v t a = 25 c 120 v in = 5.0 v t a = 125 c t a = 25 c t a = 40 c v in , input control voltage (v) 6.0 12 18 24 30 v cc , supply voltage (v) 0 1.0 2.0 3.0 4.0 5.0 6.0 a) 1.30 , current squaring constant ( a/v ) k 0 1.25 1.20 1.05 1.00 0.95 1.4 , fault voltage (v) v fault 1.0 0.8 0.6 0.4 0.2 v cc = 14 v t a = 25 c m 2 1.15 1.10 r x = 100 k v ds = 2.0 v t a = 125 c t a = 25 c t a = 40 c i fault , fault sink current (ma) 6.0 12 18 24 30 v cc , supply voltage (v) 0 1.0 2.0 3.0 4.0 5.0 160 140 figure 4. input control current versus input control voltage figure 5. input control current versus supply voltage figure 6. fault voltage versus fault sink current figure 7. squaring constant ako versus supply voltage figure 8. timer current versus draintosource voltage squared figure 9. timer current versus draintosource voltage squared , input control current ( i in m a) t a = 40 c t a = 25 c t a = 125 c t a = 125 c t a = 25 c t a = 40 c 300 , timer current ( i sq m a) 1.2 MC33091A 5 motorola analog ic device data , timer lower threshold voltage (v) v tl , timer lower threshold voltage (v) v tl , timer upper threshold voltage (v) v th t a , ambient temperatue ( c) 45 4.52 figure 10. timer upper threshold voltage versus temperature 4.64 4.62 4.60 4.58 4.56 4.54 4.50 figure 11. timer upper threshold voltage versus supply voltage 4.64 4.62 4.60 4.58 4.50 figure 12. timer lower threshold voltage versus temperature 1.10 1.05 1.00 0.95 0.85 0.80 0.75 figure 13. timer lower threshold voltage versus supply voltage 1.2 1.1 1.0 0.9 0.8 0.5 figure 14. gate voltage versus input control voltage 5.0 figure 15. gate voltage versus supply voltage 40 35 20 15 30 , timer upper threshold voltage (v) v th 4.52 4.56 4.54 0.7 0.6 , gate voltage (v) v g 25 20 15 10 5.0 30 25 50 0 50 150 6.0 v cc , supply voltage (v) 12 18 24 50 0 50 100 150 t a , ambient temperatue ( c) 6.0 12 18 24 30 v cc , supply voltage (v) v in , input control voltage (v) 6.0 12 18 24 30 v cc , supply voltage (v) 2.0 2.2 2.4 2.6 2.8 3.0 30 100 , gate voltage (v) v g v in = 5.0 v v th = increasing v t causing gate turnoff v cc = 7.0 v v cc = 14 v v cc = 28 v t a = 40 c t a = 125 c t a = 25 c v in = 5.0 v v th = increasing v t causing gate turnoff 0.90 7.0 v v cc 28 v v in = 5.0 v v tl = decreasing v t causing gate turnon t a = 40 c t a = 25 c t a = 125 c v in = 5.0 v v tl = decreasing v t causing gate turnon v cc = 14 v t a = 25 c 40 c t a 125 c v in = 5.0 v (gate aono) i g 5.0 m a 0 MC33091A 6 motorola analog ic device data , gate voltage (v) v g , gate saturation voltage (v) v g(sat) , gate saturation voltage (v) v g , gate current ( a) i g , gatetosource voltage (v) v gs 2.25 10 figure 16. gate voltage versus supply voltage 1.15 1.10 1.05 1.00 0.80 figure 17. gate voltage verus gate current 50 40 30 0 figure 18. gatetosource voltage versus source voltage 14 12 10 8.0 6.0 figure 19. gate current versus supply voltage 400 250 150 100 0 figure 20. gate saturation voltage versus gate current 0 figure 21. gate saturation voltage versus gate current (expanded scale) 1.35 0.45 0 2.5 , gate voltage (v) v g 20 50 1.5 1.0 0.5 0.90 200 i g , gate current (ma) i g , gate current ( m a) 6.0 12 18 30 v cc , supply voltage (v) 0 i g , gate current ( m a) 50 100 150 200 0.5 1.0 1.5 2.0 2.5 v src , source voltage (v) 6.0 12 18 24 30 0 80 100 0 0.2 0.4 0.8 1.0 300 24 v cc , supply voltage (v) 20 40 60 m t a = 125 c t a = 40 c t a = 25 c v in = 0 v (gate aoffo) 125 c 25 c 40 c 125 c 25 c 40 c 40 c 125 c 25 c v cc = 28 v v cc = 14 v v cc = 7.0 v 0.95 0.90 0.85 250 t a = 125 c t a = 25 c t a = 40 c v cc = 14 v load shorted t a = 40 c t a = 25 c t a = 125 c v in = 5.0 v v g = v cc 300 350 t a = 40 c t a = 25 c t a = 125 c 0.6 2.0 t a = 40 c t a = 25 c t a = 125 c 1.80 MC33091A 7 motorola analog ic device data , minimum timer response time (s) t (min) , gate voltage (v) v g 10 4 10 5 figure 22. draintosource voltage versus external r t timer resistor 7.0 4.0 3.0 2.0 0 figure 23. timer response versus v ds(min) / s ratio 10 0 10 1 10 2 10 6 figure 24. fet comparison gate response 20 15 10 5.0 0 figure 25. fet comparison gate response 30 25 15 10 0 figure 26. fet comparison gate response 0 figure 27. mtp25n06 gate response 0 50 , draintosource voltge (v) v ds(min) 10 3 t a = 25 c 5.0 30 20 10 20 t, time ( m s) t, time ( m s) 100 200 300 1000 r t , external timer resistor (k w ) 0.05 v ds(min) /v s , draintosource voltage to supply voltage ratio 0.10 0.15 0.40 0.45 0 100 200 300 400 900 1000 t, time ( m s) 0 0 100 200 300 400 0.50 800 t, time ( m s) , gate voltage (v) v g , gate voltage (v) v g , gate voltage (v) v g 6.0 5.0 1.0 400 500 600 700 900 0.20 0.25 0.30 0.35 r x = 100 k r x = 75 k r x = 50 k v ds(min) = [(v th r x 2 i q )/r t ] 1/2 v th = 4.6 v i q 100 m a r t c t = 1.0 r t c t = 0.1 r t c t = 0.01 t (min) = r t c t in[1 (v ds(min) /v s 2 ] 500 600 700 800 mtp8n10 c iss = 500 pf mtp50n06 c iss = 3000 pf mtp25n06 c iss = 1000 pf input = 5.0 v step v cc = 7.0 v t a = 25 c 0 100 200 300 400 900 1000 500 600 700 800 mtp8n10 c iss = 500 pf mtp25n06 c iss = 1000 pf mtp50n06 c iss = 3000 pf input = 5.0 v step v cc = 14 v t a = 25 c 600 800 500 700 40 mtp50n06 c iss = 3000 pf mtp25n06 c iss = 1000 pf mtp8n10 c iss = 500 pf input = 5.0 v step v cc = 28 v t a = 25 c 100 200 300 400 900 1000 500 600 700 800 50 30 20 10 40 mtp25n06 c iss = 1000 pf input = 5.0 v step v cc = 28 v v cc = 14 v v cc = 7.0 v MC33091A 8 motorola analog ic device data figure 28. descriptive waveform diagram +v cc (pin 5) v src + 14 v input (pin 7) gate (pin 4) v t (pin 8) fault (pin 6) src (pin 1) drn (pin 2) v z v gc 7.0 v v th v tl v ds normal operation shorted fet load normal operation overvoltage <30 v 0 v 5.0 v 0 v 0 v 0 v v pu 0 v MC33091A 10 motorola analog ic device data i q is an internal current source parameter of the MC33091A that has a nominal value of 100 m a and r x is the external resistor in series with the drain of the tmos device that establishes the value of the voltage to current proportionality constant. since the parallel combination of r t and c t appear at the timer pin (v t ), the timer pin voltage, v t , can be written as: v t (t) = i sq r t [1e t/(r t c t ) ] (2) with the input (pin 7) in a logic high state and no overcurrent condition exists, the tmos device will be in the aono state. if the tmos device experiences an overcurrent condition, i sq flowing through r t will increase causing c t to charge up, in turn causing the timer voltage, v t , to exceed the threshold, v th , of the upper comparator. this sets the latch causing the q output of the latch to go high (and the q output to go low), causing the tmos gate and fault output (pin 6) to be pulled low, disabling the tmos device. both the current squaring circuit (i sq ) and the charge pump are disabled whenever the q output of the latch goes low. using equation 2, the fault time response for an overcurrent condition can be written as: t = r t c t ln(1v th /i sq r t ) (3) using equation 1 and substituting for i sq in equation 3: t = r t c t ln[1(v th r x 2 i q )/(v ds 2 r t )] (4) when the timer current (i sq ) is disabled, the attained v th voltage at pin 8 decays according to the r t c t time constant until the v tl threshold of the lower comparator is reached. at this point the latch is reset and the tmos gate, charge pump and the current squaring circuit are again enabled, again turning on the tmos device. the MC33091A will repeatedly duty cycle the tmos gate in this manner so long as the overcurrent condition exists and the input control signal remains in a high logic state. the fault output (pin 6) will likewise duty cycle. consider the case where in equation 4 the term (v th r x 2 i q ) / (v ds 2 r t ) 1 such that the time period is undefined. solving for v ds for this case yields the minimum drain to source voltage necessary which will not allow v t to charge to the v th threshold of the upper comparator. in other words, whenever the tmos ontime period is infinite, no tmos overcurrent condition exists. the minimum drain to source voltage required for uninterrupted continuous tmos operation is: (5) v ds(min) = [(v th r x 2 i q )/r t ] 1/2 = (v th /kr t ) 1/2 under normal operating steady state tmos aono conditions; the values chosen for r x and r t should be such that the upper comparator threshold voltage is never reached. this insures the tmos device will always be in operation so long as the v ds(min) is not exceeded. the minimum time required for the capacitor c t to charge up to upper comparator threshold voltage occurs when the tmos device experiences maximum current (i max ). this will occur when the load, and in turn the source, are shorted to ground resulting in the full battery voltage (v s ) to appear directly across the tmos device. this condition causes maximum i sq current to be produced by the current squaring circuit. the maximum i sq current experienced is: i sq(max) = kv s 2 = (v s /r x ) 2 /i q (6) an expression for the minimum timeout is obtained by substituting i q of equation 6 into equation 3: (7) t (min) = r t c t ln[1v th /(i sq(max) r t )] equation 4 is shown graphically along with the asymptotic limits imposed by equations 5 and 7 in figure 29. t, time (s) 10 3 10 0 10 1 10 2 10 4 t = r t c t in(1 v th r x 2 i q / v ds 2 r t ) figure 29. theoretical fault time versus v ds t (min) = r t c t in(1 v th / i (max) r t ) r x = 75 k r t = 200 k c t = 0.02 m f v th = 4.6 v i q = 100 ma i (max) = select v ds(min) = [(v th r x 2 i q ) / r t ] 1/2 v ds , draintosource voltage (v) 4.0 8.0 12 16 2.0 6.0 10 14 when driving incandescent lamp loads, the minimum timer timeout (time required for the v t voltage to reach v th threshold of the upper comparator) should be set long enough so as to not allow the inrush current of incandescent lamp to cause a false trigger, yet short enough to afford the tmos device survival protection against direct shorts under worst case supply and temperature conditions. tmos driver power dissipation under load short conditions, the MC33091A will duty cycle the tmos gate. the power dissipation in this mode can be significant. for this reason proper heatsinking of the tmos device is essential as is the selection of compatible external components so as to protect the tmos device from destruction. in most cases, the heatsink required to handle the tmos power dissipation under normal operating conditions will be adequate to insure the device survives a short circuit for an indefinite time under worst case conditions. the MC33091A can protect the tmos device under a direct load short condition. if the source voltage is less than about 1.5 v above ground, which will normally be the case in the event of a dead short, the MC33091A will clamp the gate to source voltage at 7.0 v. this action will limit the tmos current and power dissipated under a direct load short condition. MC33091A 11 motorola analog ic device data the data sheet for the particular tmos device being used will normally reveal the current value, i ds(max) , to be expected under a dead short condition. tmos data sheets normally depict graphs of drain current versus drain to source voltage for various gate to source voltages from which the drain current at 7.0 v v gs , i ds(max) , can reasonably be approximated. using this information, the peak tmos power dissipation under a dead short condition is approximated to be: p d(peak) = v s(max) i ds(max) (8) the average power is equal to the peak power dissipation multiplied by the duty cycle (dc): p d(avg) = p d(peak) dc (9) as long as the average power, in equation 9, is less than the maximum power dissipation of the tmos device under normal conditions, the short circuit protection scheme of the MC33091A will adequately protect the tmos device. the duty cycle at which the MC33091A controls the gate can be determined by using figure 30. 6.0 dc, duty cycle (%) 10 0 v th = 4.6 v v tl = 0.95 v b = v ds /v ds(min) figure 30. MC33091A duty cycle versus v ds / v ds(min) 8.0 6.0 4.0 2.0 (v th b 2 v th ) dc = 1 in(v tl /v th ) (v tl b 2 v th ) in 1 + v ds /v ds(min) 2.0 4.0 10 12 8.0 as previously discussed, i sq is externally dependant on the sensed v ds voltage developed across the tmos device and r x in accordance with equations 1 and 2. at the onset of an overload condition, the voltage across c t will be less than the v th threshold voltage of the upper comparator with the tmos device in an aono state. i sq current will increase dramatically and the timing capacitor c t charges toward v th . when the voltage on c t reaches the v th threshold voltage of the upper comparator, the upper comparator output goes high setting the latch output (q) high, turning on the open collector npn transistor and pulling the fault output low. at the same time, i sq is switched off, allowing c t to discharge through resistor r t to v tl , at which time the tmos device is again switched on. this action is repeated so long as the overload condition exists. the v tl and v th thresholds are internally set to approximately 0.95 v and 4.6 v respectively. the charge time (t c ) of c t can be shown as: t c = r t c t ln[1(v th v tl )/(i sq r t v tl )] (10) the discharge time (t d ) of c t can be shown as: t d = r t c t ln(v tl /v th )(11) the duty cycle is defined as charge time divided by the charge plus discharge time and represented by: dc = t c /(t c +t d ) (12) substituting equations 10 and 11 into 12: dc = 1/1+ln(v tl /v th )/ln{(v th b 2 v th )/(v tl b 2 v th )} (13) where: b = v ds /v ds(min) notice the duty cycle is dependent only on the ratio of the drain to source voltage, v ds , of the tmos device to the minimum drain to source voltage, v ds(min) , allowing uninterrupted continuous tmos operation as calculated in equation 5. a graph of equation 13 is shown in figure 30 and is valid for any ratio of v ds to v ds(min) . knowing this ratio, the duty cycle can be determined by using figure 30 or equation 13 and knowing the duty cycle, the average power dissipation can be calculated by using equation 9. if the tmos device experiences a hard load short to ground a minimum duty cycle will be experienced which can be calculated. when this condition exists, the tmos device experiences a v ds voltage of v s which is sensed by the MC33091A. the MC33091A very rapidly charges the timing capacitor c t to v th shutting down the tmos device. this condition produces the minimum duty cycle for the specific system conditions. the minimum duty cycle can be calculated for any valid v s voltage by substituting the value of v s used for v ds in equation 13 and solving for the duty cycle. knowing the duty cycle and peak power allows determination of the average power as was pointed out in equation 9. tmos data sheets specify the maximum allowable junction temperature and thermal resistance, junctiontocase, at which the device may be operated. knowing the average power and the device thermal information, proper heatsinking of the tmos device can be determined. the duty cycle graph (figure 30) reveals lower values of v ds(min) produce shorter duty cycles, for given v ds voltages. the minimum duty cycle, being limited to the case where v ds = v s , increases as higher values of v s are used. MC33091A 12 motorola analog ic device data application the following design approach will simplify application of the MC33091A and will insure the components chosen to be optimal for a specific application. 1. characterize the load impedance and determine the maximum load current possible for the load supply voltage used. 2. select a tmos device capable of handling the maximum load current. though the MC33091A will equally drive our competitors products, it is hoped you will select one of the many tmos devices listed in motorola's power mosfet transistor data book . 3. determine the maximum steady state v ds voltage the tmos device will experience under normal operating conditions. typically, this is the maximum load current multiplied by the specified r ds(on) of the tmos device. junction temperature considerations should be taken into account for the r ds(on) value since it is significantly temperature dependent. normally, tmos data sheets depict the effect of junction temperature on r ds(on) and an r ds(on) value at some considered maximum junction temperature should be used. various graphs relating to r ds(on) are depicted in motorola tmos data sheets. though motorola tmos devices typically specify a maximum allowable junction temperature of 150 c, in a practical sense, the user should strive to keep junction temperature as low as possible so as to enhance the applications long term reliability. the maximum steady state v ds voltage the tmos device will experience under normal operating conditions is thus: v ds(norm) = i l(max) r ds(on) (14) 4. calculate the maximum power dissipation of the tmos device under normal operating conditions: p d(max) = v ds(on) i l(max) (15) 5. the calculated maximum power dissipation of the tmos device dictates the required thermal impedance for the application. knowing this, the selection of an appropriate heatsink to maintain the junction temperature below the maximum specified by the tmos manufacture for operation can be made. the required overall thermal impedance is: tr ja = (t j(max) t a(max) )/p d(max) (16) where t j(max) , the maximum allowable junction temperature, is found on the tmos data sheet and t a(max) , the maximum ambient temperature, is dictated by the application itself. 6. the thermal resistance, tr ja , represents the maximum overall or total thermal resistance, from junction to the surrounding ambient, allowable to insure the tmos manufactures maximum junction temperature will not be exceeded. in general, this overall thermal resistance can be considered as being made up of several separate minor thermal resistance interfaces comprised of tr jc , tr cs and tr sa such that: tr ja = tr jc + tr cs + tr sa (17) where tr jc , tr cs and tr sa represent the junctionto case, casetoheatsink and heatsinktoambient thermal resistances respectively. tr cs and tr sa are the only parameters the device user can influence. the casetoheatsink thermal resistance, tr cs , is material dependent and can be expressed as: tr cs = r t/a (18) where a r o is the thermal resistivity of the heatsink material (expressed in c/watt/unit thickness), ato is the thickness of heatsink material, and aao is the contact area of the casetoheatsink. heatsink manufactures specify the value of tr cs for standard heatsinks. for nonstandard heatsinks, the user is required to calculate tr cs using some form of the basic equation 18. the required heatsinktoambient thermal resistance, tr sa , can easily be calculated once the terms of equation 17 are known. substituting tr ja of equation 16 into equation 17 and solving for tr sa produces: tr sa = (t j(max) t a(max) )/p d(max) (tr jc +tr cs ) (19) consulting the heatsink manufactures catalog will provide tr cs information for various heatsinks under various mounting conditions so as to allow easy calculation of tr sa in units of c/w (or when multiplied by the power dissipation produces the heatsink mounting surface temperature rise). furthermore, heatsink manufactures typically specify for various heatsinks, heatsink efficiency in the form of mounting surface temperature rise above the ambient conditions for various power dissipation levels. the user should insure that the heatsink selected will provide a surface temperature rise somewhat less than the maximum capability of the heatsink so that the device junction temperature will not be exceeded. the user should consult the heatsink manufacturers catalog for this information. 7. set the value of v ds(min) to something greater than the normal operating drain to source voltage, v ds(norm) , the tmos device will experience as calculated in step 3 above (equation 14). from a practical standpoint, a value two or three times v ds(norm) expected under normal operation will prove to be a good starting point for v ds(min) . 8. select a value of r t less than 1.0 m w for minimal timing error whose value is compatible with r x (r x will be selected in step 9 below). a recommended starting value to use for r t would be 470 k. the consideration here is that the input impedance of the threshold comparators are approximately 10 m w and if r t values greater than 1.0 m w are used, significant timing errors may be experienced as a result of input bias current variations of the threshold comparators. 9. select a value of r x which is compatible with r t . the value of r x should be between 50 k and 100 k. recall in equation 5 that v ds(min) was determined by the combined selection of r x and r t . low values of r x will give large values for k (k = 4.0 m a/v 2 for r x = 50 k) causing i sq to be very sensitive to v ds variations (see equation 1). this is desirable if a minimum v ds trip point is needed in the 1.0 v range since small v ds values will generate measurable currents. however, at high v ds values, tmos device currents become excessively large and the current squaring function begins to deviate slightly from the predicted value due to high level injection effects occurring in the output pnp of the current squaring circuit. these effects can be seen when i sq exceeds several hundred microamps. see figure 22 for graphical aid in the selection of r t and r x . MC33091A 13 motorola analog ic device data 10. calculate the shorted load average power dissipation for the application using equations 8 and 9. this involves determining the peak shorted load power dissipation of the tmos device and gate duty cycle. the duty cycle is based on v ds(min) , the value of v ds under shorted conditions (i.e. v s(max) ). 11. the calculated shorted load average power dissipation of step 10 should be less than the maximum power dissipation under normal operating conditions calculated in step 4. if this is not the case, there are two options. option one is to reduce the thermal resistance of the tmos device heatsink, in other words, use a larger or better heatsink. this though, is not always practical to do particularly if restricted by size. option two is to set v ds(min) to the lowest practical value. if for instance v ds(min) is set to 4.0 v when only 2.0 v are needed, the short circuit duty cycle will be over twice as large, resulting in double the tmos device power dissipated. keeping v ds(min) to a minimum, reduces the shorted load average power. 12. choose a value of c t . the value of c t can be determined either by trial and error or by characterizing the v ds waveform for the load and selecting a capacitor value that generates a minimum fault time curve (see equation 4) that encompasses the v ds versus time waveform. the value of c t has no effect on the duty cycle itself as was pointed out earlier. see figure 23 for a graphical selection of c t . inductive loads the tmos device is turned off by pulling the gate to near ground potential. turning off an inductive load will cause the source of the tmos device to go below ground due to flyback voltage to the point where the tmos device may become biased on again allowing the inductive energy to be dissipated through the load. an internal 14 v zener diode clamp from the gate to source pin limits how far the source pin can be pulled below ground. for high inductive loads, it may be necessary to have an external 10 k current limiting resistor in series with the source pin to limit the clamp current in the event the source pin is pulled more than 14 v below ground. transient faults the MC33091A is not able to withstand automotive voltage transients directly. by correctly sizing resistor r s and capacitor c s , the MC33091A can withstand load dump and other automotive type transients. the v cc voltage is clamped at approximately 30 v through the use of an internal zener diode. under reverse battery conditions, the load will be energized in reverse due to the parasitic body diode inherent in the tmos device. under this condition, the drain is grounded and the MC33091A clamps the gate at 0.7 v below the battery potential. this turns the tmos device on in reverse and minimizes the voltage across the tmos device resulting in minimal power dissipation. neither the MC33091A nor the tmos device will be damaged under such a condition. in addition, if the load can tolerate a reverse polarity, the load will not be damaged. caution; some sensitive applications may not tolerate a reverse polarity load condition with reverse battery polarity. there is no protection of the tmos device during a reverse battery condition if the load itself is already shorted to ground. the MC33091A will not incur damage under this specialized reverse battery condition but the tmos device may be damaged since there could be significant energy available from the battery to be dissipated in the tmos device. the MC33091A will withstand a maximum v cc voltage of 28 v and with the proper tmos device used, the system can withstand a double battery condition. figure 36 depicts a method of protecting the fet from positive transient voltages in excess of the rated fet breakdown voltage. the zener voltage, in this case, should be less than the fet breakdown voltage. the diode, d, is necessary where reverse battery protection of the gate of the fet is required. emi concern the gate capacitance and thus the size of the tmos device used will determine the turnon and turnoff times experienced. in a practical sense, smaller tmos devices have smaller gate capacitances and give rise to higher slew rates. by way of example, the turnon of an mpt50n06 tmos device might be of the order of 80 m s while that of an mpt8n10 might be 10 m s (see figure 25). the speed of turnon or turnoff can be calculated by assuming the charge pump to supply approximately 100 m a over the time the gate capacitance will transition a v gs voltage of 0 v to 10 v. in reality, the v gs voltage will be greater than 10 v, but the additional increase in tmos drain current will be minimal for v gs voltages greater than 10 v. the charge pump current is sized so that turnon time need not be of concern in all but the most critical of applications. where limiting of emi is of concern, the charge pump of the MC33091A may be slew rate limited by adding an external feedback capacitor from the gatetosource of the tmos device for slow down adjustment of both turnon and turnoff times (see figure 33). figures 31 through 35 depict various methods of modifying the turnon or turnoff times. figure 35 depicts a method of using only six external components to decrease turnoff time and clamp the flyback voltage associated with switching inductive loads. v gs(th) used in the critical component selection criteria refers to the gatetosource threshold voltage of the fet used in the application. caution should be exercised when slowing down the switching transition time since doing so can greatly increase the average power dissipation of the tmos device. the resulting increase in power dissipation should be taken into account when selecting the r t c t time constant values in order to protect the tmos device from any overcurrent condition. MC33091A 14 motorola analog ic device data load figure 31. slow down fet turnon figure 32. slow down fet turnoff figure 33. slow down turnon and turnoff of fet figure 34. independent slow down adjustment of fet turnon and turnoff figure 35. decreased fet turnoff time with inductive flyback voltage clamp figure 36. overvoltage protection of fet charge pump + gate 4 src 1 r d +v s load charge pump + gate 4 src 1 r d +v s charge pump + gate 4 src 1 +v s load c charge pump + gate 4 src 1 r (on) +v s load r (off) charge pump + load v t r 1 v z v s r 2 > z r 1 10 k gate 4 src 1 30 k 10 k 10 k 200 r 2 +v s load +v s charge pump + z r 1 gate 4 src r 2 d 1 MC33091A 15 motorola analog ic device data p suffix plastic package case 62605 issue k d suffix plastic package case 75105 (so8) issue n outline dimensions notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 a b t seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m 10 10 n 0.76 1.01 0.030 0.040 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. seating plane 14 5 8 c k 4x p a 0.25 (0.010) m tb ss 0.25 (0.010) m b m 8x d r m j x 45 f a b t dim min max min max inches millimeters a 4.80 5.00 0.189 0.196 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.18 0.25 0.007 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 g MC33091A 16 motorola analog ic device data motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. atypicalo parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer. how to reach us: usa / europe / locations not listed : motorola literature distribution; japan : nippon motorola ltd.; tatsumispdjldc, 6f seibubutsuryucenter, p.o. box 20912; phoenix, arizona 85036. 18004412447 or 6023035454 3142 tatsumi kotoku, tokyo 135, japan. 038135218315 m asi a / p acifi c : m o torol a s e mi c ondu c tor s h .k . l td. ; 8 b t a i p i n g i ndu s tria l p a r k , i 5 1 t i n g k o k r oad , t a i po , n. t . , hon g kong . 85226629298 MC33091A/d ? |
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